DTM63394F is a Registered 256Mx72 memory module which conforms to JEDEC's DDR2, PC2-5300 standard. The assembly is comprised of two Ranks of nine each 128Mx8 DDR2 Samsung DRAMs, two Registers, one Phase-Locked Loop (PLL), and one 2Kbit EEPROM used for Serial Presence Detect.

Both output driver strength and input termination impedance are programmable to maintain signal integrity on the I/O signals. Error Checking and Correction bits are provided to ensure data integrity. In addition, parity is checked for all address and control lines, even those address lines are not used by this module.

The eighteen Data Strobe signals may be used either as nine differential pairs, or as eighteen single-ended strobes for use in systems with a mix of x4 and x8 DRAMs.